NXP Semiconductors /LPC408x_7x /EMC /DYNAMICXSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DYNAMICXSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TXSR0RESERVED

Description

Time for exit self-refresh to active command.

Fields

TXSR

Exit self-refresh to active command time. 0x0 - 0x1E = n + 1 clock cycles. The delay is in CCLK cycles. 0x1F = 32 clock cycles (POR reset value).

RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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